The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2007

Filed:

Dec. 30, 2004
Applicant:

Kang-hyun Lee, Yongin, KR;

Inventor:

Kang-Hyun Lee, Yongin, KR;

Assignee:

Dongbu Electronics, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for forming a dual damascene interconnection in a semiconductor device. An etch stop film and an intermetal insulating film are formed sequentially on a lower metal film. A via hole is formed to expose a portion of a surface of the etch stop film through the intermetal insulating film. A sacrificial film is formed to fill the via hole. Portions of the intermetal insulating film and the sacrificial film are removed to form a trench. The sacrificial film is removed to expose the portion of the surface of the etch stop film. A plasma etching process is performed at a predetermined temperature using an etching gas to remove the exposed portion of the etch stop film and to prevent or suppress generation of a polymer. A diffusion barrier film is formed within the trench and the via hole such that the diffusion barrier contacts the lower metal film. An upper metal film is formed on the diffusion barrier.


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