The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2007

Filed:

Mar. 31, 2005
Applicants:

Edoardo Campini, Mesa, AZ (US);

Douglas Lee Stahl, Phoenix, AZ (US);

Steven Denies, East Aurora, NY (US);

Jay Gilbert, Portland, OR (US);

Jacek Budny, Gdynia, PL;

Gerard Wisniewski, Rotmanka, PL;

Inventors:

Edoardo Campini, Mesa, AZ (US);

Douglas Lee Stahl, Phoenix, AZ (US);

Steven DeNies, East Aurora, NY (US);

Jay Gilbert, Portland, OR (US);

Jacek Budny, Gdynia, PL;

Gerard Wisniewski, Rotmanka, PL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A stacked multiple connection module that provides multiple times the input/output (I/O) signal capacity of a single connection module. In one embodiment, a stacked dual connection module includes first and second circuit boards with respective edge connectors maintained at a parallel offset and configured to couple to a mating two slotted stacked edge connector. A connection means is provided to couple signals between the first and second circuit boards, such that components mounted on the first and/or second circuit board are enabled to access I/O signals via both of the edge connectors, thus doubling I/O signal capacity. In one embodiment, the stacked dual connection module comprises an Advanced Mezzanine Card (AdvancedMC) module having edge connectors configured to mate with an AdvancedMC connector.


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