The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2007
Filed:
Jun. 28, 2004
Prashant S. Sawkar, Portland, OR (US);
Bala K. Iyer, Hillsboro, OR (US);
Silvian Goldenberg, Beaverton, OR (US);
Prashant Saxena, Portland, OR (US);
Prashant S. Sawkar, Portland, OR (US);
Bala K. Iyer, Hillsboro, OR (US);
Silvian Goldenberg, Beaverton, OR (US);
Prashant Saxena, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Provided are a method, system, and program for processing and verifying circuit designs. A circuit design specification written in a hardware definition language is received and zero delay black box code is added to the circuit design specification to position the zero delay black boxes at sequential elements. A synthesis of the circuit design specification is performed to generate a retimed implementation of the circuit design specification. The black boxes are processed in the retimed implementation to verify the synthesis of the circuit design.