The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2007

Filed:

Sep. 09, 2005
Applicants:

Masakazu Yamaguchi, Kawasaki, JP;

Hideaki Ninomiya, Yokohama, JP;

Ichiro Omura, Yokohama, JP;

Tomoki Inoue, Tokyo, JP;

Inventors:

Masakazu Yamaguchi, Kawasaki, JP;

Hideaki Ninomiya, Yokohama, JP;

Ichiro Omura, Yokohama, JP;

Tomoki Inoue, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/74 (2006.01); H01L 29/423 (2006.01); H01L 31/111 (2006.01);
U.S. Cl.
CPC ...
Abstract

A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.


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