The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2007
Filed:
May. 06, 2003
Applicants:
Sergei B. Gashkov, Moscow, RU;
Alexander E. Andreev, San Jose, CA (US);
Inventors:
Sergei B. Gashkov, Moscow, RU;
Alexander E. Andreev, San Jose, CA (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method for constructing a logic circuit for inversion in finite field GF(2) is described, where m=nk, and k, n are coprime numbers, using bases in subfields GF(2) and GF(2). The method may be applied to error correction codes, including BCH codes, Reed-Solomon codes (which are a subset of BCH codes), turbo codes, and the like.
Gashkov, Sergei. (2007). Method for constructing logic circuits of small depth and complexity for operation of inversion in finite fields of characteristic 2 (U.S. Patent No. 7167886). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7167886
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