The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2007

Filed:

Sep. 09, 2005
Applicants:

Osvaldo Jorge Lopez, Annandale, NJ (US);

Mark Henry S. Antiporta, Metro Manila, PH;

Fernando V. Capinig, Quezon, PH;

Ricky B. Calustre, Bulacan, PH;

Emmievel S. Anacleto, Quezon, PH;

Mizpa B. Mijares, San Carlos, PH;

Inventors:

Osvaldo Jorge Lopez, Annandale, NJ (US);

Mark Henry S. Antiporta, Metro Manila, PH;

Fernando V. Capinig, Quezon, PH;

Ricky B. Calustre, Bulacan, PH;

Emmievel S. Anacleto, Quezon, PH;

Mizpa B. Mijares, San Carlos, PH;

Assignee:

Ciclon Semiconductor Device Corp., Bethlehem, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clip-less packaged semiconductor device includes at least one semiconductor die having bottom and top surfaces each having at least one electrode. A leadframe comprising a sheet of conductive material having top and bottom surfaces, the top surface being substantially planar, the bottom surface having a recessed region having a thickness less than the thickness of the sheet of conductive material formed in the sheet and defining a plurality of planar lead contacts, is electrically coupled to the top surface of the die at its bottom surface in the recessed region. An encapsulating layer partially encloses the leadframe and die, wherein the encapsulating layer occupies portions of the recessed region not occupied by the die, wherein the bottom surface of the die and the plurality of leadframe contacts are exposed through the encapsulating layer at least at the bottom surface of the packaged semiconductor device.


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