The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 2007
Filed:
Dec. 11, 2003
Wang-jin Chen, Kaoshiong, TW;
Chen-teng Fan, Hsinchu, TW;
Cheng-i Huang, Hsinchu, TW;
Ya-yun Liu, Hsinchu, TW;
Wang-Jin Chen, Kaoshiong, TW;
Chen-Teng Fan, Hsinchu, TW;
Cheng-I Huang, Hsinchu, TW;
Ya-Yun Liu, Hsinchu, TW;
Faraday Technology Corp., Hsin-Chu, TW;
Abstract
An I/O circuit placement method. In the I/O circuit placement method, at least two rows of I/O circuits are placed on a first side of the chip, and each I/O circuit has a head section and a tail section. The placement direction of the head section and the tail section is perpendicular to the placement direction of the I/O circuits in the rows. The semiconductor further has a core circuit disposed on the chip, wherein the rows of I/O circuits are disposed outside the core circuit and are at the periphery of the chip. Due to the I/O circuit placement in the semiconductor device, the present invention reduces the area of the semiconductor chip and fabrication cost.