The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2007
Filed:
Jul. 12, 2001
Feng Chen, Singapore, SG;
Lup San Leong, Singapore, SG;
Charles Lin, Singapore, SG;
Chartered Semiconductor Manufacturing Limited, Singapore, SG;
Abstract
In one embodiment, a dielectric layer () overlying a semiconductor substrate () is uniformly polished. During polishing, the perimeter () of the semiconductor substrate () overlies a peripheral region () of a polishing pad () and an edge portion () of the front surface of semiconductor substrate () is not in contact with the front surface () of the polishing pad (), in the peripheral region (). As a result, the polishing rate at the edge portion () of the semiconductor substrate () is reduced, and the semiconductor substrate () is polished with improved center to edge uniformity. Since the semiconductor substrate () is polished with improved center to edge uniformity, die yield is increased because die located within the edge portion () of the semiconductor substrate () are not over polished.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile