The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2006
Filed:
Sep. 30, 2002
Chanh Le, Beaverton, OR (US);
Say Cheong Gan, Melaka, MY;
Thomas A. Repko, Dallas, OR (US);
Frank W. Joyce, Portland, OR (US);
Teik Sean Toh, Sungai Petani, MY;
Douglas P. Kreager, Lake Oswego, OR (US);
Yoong LI Liew, Kulim, MY;
Chanh Le, Beaverton, OR (US);
Say Cheong Gan, Melaka, MY;
Thomas A. Repko, Dallas, OR (US);
Frank W. Joyce, Portland, OR (US);
Teik Sean Toh, Sungai Petani, MY;
Douglas P. Kreager, Lake Oswego, OR (US);
Yoong Li Liew, Kulim, MY;
Intel Corporation, Santa Clara, CA (US);
Abstract
An apparatus and method for automatically testing circuit boards, such as computer system boards and the like. The circuit board device under test (DUT) is loaded into an automated test apparatus (tester), which includes a mechanism for automatically connecting test electronics to various DUT circuitry and I/O ports via corresponding connectors on the DUT. A type of DUT is identified, and a corresponding set of tests are performed to verify the operation of the DUT. Appropriate power signals and sequencing are also applied to the DUT, as defined by it type. Data logging is performed to log the results of the testing. The apparatus includes replaceable probe/connector plates that are DUT-type specific and corresponding universal electronics and cabling to enable a variety of different board types to be tested with the same apparatus.