The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2006
Filed:
Oct. 26, 2005
Harald Streif, S. Burlington, VT (US);
Stefan Wuensche, Sunnyvale, CA (US);
Mike Killian, Richmond, VT (US);
Harald Streif, S. Burlington, VT (US);
Stefan Wuensche, Sunnyvale, CA (US);
Mike Killian, Richmond, VT (US);
Infineon Technologies AG, Munich, DE;
Abstract
A memory device () includes an array () of memory cells arranged in rows and columns. Preferably, each memory cell includes a pass transistor coupled to a storage capacitor. A row decoder () is coupled to rows of memory cells while a column decoder () is coupled to columns of the memory cells. The column decoder () includes an enable input. A variable delay () has an output coupled to the enable input of the column decoder (). The variable delay () receives an indication (R/W') of whether a current cycle is a read cycle or a write cycle. In the preferred embodiment, a signal provided at the output of the variable delay () is delayed if the current cycle is a read cycle compared to if the current cycle is a write cycle.