The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2006
Filed:
Aug. 31, 2004
Fuja Shone, Hsinchu, CN;
I-long Lee, Hsinchu, CN;
Yi-ching Liu, Hsinchu, CN;
Hsin-chien Chen, Hsinchu, CN;
Wen-lin Chang, Hsinchu, CN;
Fuja Shone, Hsinchu, CN;
I-Long Lee, Hsinchu, CN;
Yi-Ching Liu, Hsinchu, CN;
Hsin-Chien Chen, Hsinchu, CN;
Wen-Lin Chang, Hsinchu, CN;
Skymedi Corporation, Hsinchu, TW;
Abstract
A method for programming a split gate memory cell comprises the following steps. First, a split gate memory cell formed on a semiconductor substrate of a first conductive type, e.g., p-type, is provided. The split gate memory cell has two bitlines of a second conductive type, e.g., n-type, a select gate, a floating gate, a wordline and a dielectric layer deposited between the floating gate and the semiconductor substrate, wherein the select gate and floating gate are transversely disposed between the two bitlines, the wordline is above the select gate and floating gate. Second, a positive voltage is applied to the wordline so as to turn on the floating gate, and a negative voltage is applied to the bitline next to the floating gate, whereby a bias voltage across the tunnel dielectric layer is generated for programming, that is, the so called F-N programming.