The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2006

Filed:

Nov. 01, 2004
Applicant:

Tom Youssef, Dallas, TX (US);

Inventor:

Tom Youssef, Dallas, TX (US);

Assignee:

STMicroelectronics, Inc., Carrollton, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A power on reset circuit includes a pulse generation circuit that is connected to receive a supply voltage and respond to an initial ramp-up of that supply voltage to generate an output pulse that transitions from a low to a relatively high state tracking the supply voltage ramp-up. The pulse generation circuit further sets a feedback node in an enable state. Responsive to a flip signal received at an input node, the pulse generation circuit then transitions the output pulse from the relatively high state to the low state and sets the feedback node in a disable state. A static current control transistor switch includes a source-drain circuit coupled to the supply voltage and further includes a gate. The gate is connected to the feedback node such that the transistor switch is actuated in response to the feedback node enable state and unactuated in response to the feedback node disable state. A resistive divider circuit, including at least two resistors connected in series with each other at a tap, is connected in series with the source-drain circuit of the static current control transistor. The tap of the resistive divides circuit is connected to the input node of the pulse generation circuit to supply the flip signal.


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