The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2006

Filed:

Aug. 25, 2003
Applicants:

Tange Nan Barbour, Hinesburg, VT (US);

Thomas S. Barnett, Burlington, VT (US);

Matthew Sean Grady, Burlington, VT (US);

William Vincent Huott, Holmes, NY (US);

Michael Richard Ouellette, Westford, VT (US);

Inventors:

Tange Nan Barbour, Hinesburg, VT (US);

Thomas S. Barnett, Burlington, VT (US);

Matthew Sean Grady, Burlington, VT (US);

William Vincent Huott, Holmes, NY (US);

Michael Richard Ouellette, Westford, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for determining minimum post production test time on an integrated circuit device to achieve optimal reliability of that device utilizing defect counts. The number of defective cells or active elements with defective cells (DEFECTS) on the integrated circuit device are counted and this count serves as a basis for determining the minimum test time. A higher number of DEFECTS results in longer post production testing in order to achieve optimum reliability of the integrated circuit device. The number of DEFECTS can be counted on a device internal to the integrated circuit device and made available to determine the minimum required test time. The number of DEFECTS can also be obtained external to the integrated circuit device by intercepting information routed to another device. Information provided internally and externally can also reveal the physical location of DEFECTS to further refine the minimum required test time.


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