The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2006
Filed:
Nov. 20, 2003
Kanti Jain, Hawthorne, NY (US);
Carl C. Kling, Hawthorne, NY (US);
Kanti Jain, Hawthorne, NY (US);
Carl C. Kling, Hawthorne, NY (US);
Anvik Corporation, Hawthorne, NY (US);
Abstract
Significant advances in semiconductor microelectronics technologies have resulted in greatly enhanced chip performance. Systems studies have continuously shown that on-board interconnects between chips are the bottleneck in achieving board level performance that is comparable with this chip performance. This invention provides a multiple-layer photonic-electronic circuit board family that solves this interconnect performance problem. Multiple layers of patterned optical channel waveguides and patterned electrical conductors co-exist in a single circuit board structure, with optical vias to transport light between different photonics layers and electrical vias to transport electrical signals and power between different electronics layers. An all-lithographic fabrication technology is used to build the entire board structure with mutually compatible planar processing steps. Novel techniques are used to produce channel optical waveguides connected to in-plane 45 degree turning mirrors and channel optical waveguides connected to optical vias with out-of-plane 45 degree turning mirrors. The mirrors can have either total internal reflection or metallized facets.