The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2006

Filed:

Feb. 28, 2002
Applicants:

Nickhil Jakatdar, Los Altos, CA (US);

Xinhui Niu, Los Altos, CA (US);

Junwei Bao, Fremont, CA (US);

Inventors:

Nickhil Jakatdar, Los Altos, CA (US);

Xinhui Niu, Los Altos, CA (US);

Junwei Bao, Fremont, CA (US);

Assignee:

Timbre Technologies, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06G 7/62 (2006.01);
U.S. Cl.
CPC ...
Abstract

An exemplary method and system for generating integrated circuit (IC) simulation information regarding the effect of design and fabrication process decisionn includes creating and using a data store of profile-based information comprising metrology signal, structure profile data, process control parameters, and IC simulation attributes. An exemplary method and system for generating a simulation data store using signals off test gratings that model the effect of an IC design and/or fabrication process includes creating and using a simulation data store generated using test gratings that model the geometries of the IC interconnects. The interconnect simulation data store may be used in-line for monitoring electrical and thermal properties of an IC device during fabrication. Other embodiments include utilizing a metrology simulator and various combinations of a fabrication process simulator, a device simulator, and/or circuit simulator.


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