The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2006

Filed:

Sep. 03, 2003
Applicants:

Seiichi Nakatani, Hirakata, JP;

Yoshihiro Bessho, Higashiosaka, JP;

Yasuhiro Sugaya, Osaka, JP;

Keiji Onishi, Settsu, JP;

Inventors:

Seiichi Nakatani, Hirakata, JP;

Yoshihiro Bessho, Higashiosaka, JP;

Yasuhiro Sugaya, Osaka, JP;

Keiji Onishi, Settsu, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing an electric element built-in module including flip-chip mounting at least one electric element such as a semiconductor chip or a surface acoustic wave device on a wiring pattern, sealing the electric element with a thermosetting resin composition, and grinding or abrading the thermosetting resin composition and electric element from a side of the electric element opposite that of the wiring pattern. The method provides upper surfaces of the electric element and the thermosetting resin composition that are substantially flush with each other. The method provides an electric element built-in module suitable for high-density packaging with a reduced thickness without damaging the electric element and while maintaining mechanical strength.


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