The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2006

Filed:

Dec. 17, 2003
Applicants:

Michael Werner Beattie, Austin, TX (US);

Anirudh Devgan, Austin, TX (US);

Byron Lee Krauter, Leander, TX (US);

Hui Zheng, Austin, TX (US);

Inventors:

Michael Werner Beattie, Austin, TX (US);

Anirudh Devgan, Austin, TX (US);

Byron Lee Krauter, Leander, TX (US);

Hui Zheng, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method, system, and product are disclosed for determining a voltage drop across an entire integrated circuit package. A geometric description of the entire integrated circuit package is determined. The description is subdivided into non-uniform areas. A resistance of each one of the non-uniform areas is determined. A resistive netlist of the entire integrated circuit package is then determined by combining the resistance of each one of the non-uniform areas. The package is then simulated utilizing the netlist to determine the voltage drop across the entire integrated circuit package.


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