The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 07, 2006
Filed:
Jan. 29, 2004
Koichi Ohto, Kanagawa, JP;
Tatsuya Usami, Kanagawa, JP;
Noboru Morita, Kanagawa, JP;
Sadayuki Ohnishi, Kanagawa, JP;
Koji Arita, Kanagawa, JP;
Ryohei Kitao, Kanagawa, JP;
Yoichi Sasaki, Kanagawa, JP;
Koichi Ohto, Kanagawa, JP;
Tatsuya Usami, Kanagawa, JP;
Noboru Morita, Kanagawa, JP;
Sadayuki Ohnishi, Kanagawa, JP;
Koji Arita, Kanagawa, JP;
Ryohei Kitao, Kanagawa, JP;
Yoichi Sasaki, Kanagawa, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.