The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2006

Filed:

Oct. 14, 2003
Applicants:

Erwin B. Cohen, South Burlington, VT (US);

Thomas E. Cook, Essex Junction, VT (US);

Ian R. Govett, Richmond, VT (US);

Paul D. Kartschoke, Williston, VT (US);

Stephen V. Kosonocky, Wilton, CT (US);

Peter A. Sandon, Essex Junction, VT (US);

Keith R. Williams, Essex Junction, VT (US);

Inventors:

Erwin B. Cohen, South Burlington, VT (US);

Thomas E. Cook, Essex Junction, VT (US);

Ian R. Govett, Richmond, VT (US);

Paul D. Kartschoke, Williston, VT (US);

Stephen V. Kosonocky, Wilton, CT (US);

Peter A. Sandon, Essex Junction, VT (US);

Keith R. Williams, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A power saving cache and a method of operating a power saving cache. The power saving cache includes circuitry to dynamically reduce the logical size of the cache in order to save power. Preferably, a method is used to determine optimal cache size for balancing power and performance, using a variety of combinable hardware and software techniques. Also, in a preferred embodiment, steps are used for maintaining coherency during cache resizing, including the handling of modified ('dirty') data in the cache, and steps are provided for partitioning a cache in one of several way to provide an appropriate configuration and granularity when resizing.


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