The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2006

Filed:

Mar. 29, 2001
Applicants:

Ryo Inoue, Austin, TX (US);

Juan G. Revilla, Austin, TX (US);

Inventors:

Ryo Inoue, Austin, TX (US);

Juan G. Revilla, Austin, TX (US);

Assignees:

Intel Corporation, Santa Clara, CA (US);

Analog Devices, Inc., Norwood, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one implementation, a programmable processor is adapted to include a first set of registers and a second set of registers. The first set of registers may have a future file, and the second set of registers may be architectural registers. Following a termination of an instruction in the processor, the future file may be restored with values in the second set of registers. The future file is restored over more than one clock cycle.


Find Patent Forward Citations

Inoue, Ryo. (2006). Peak power reduction when updating future file (U.S. Patent No. 7124285). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7124285

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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