The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2006
Filed:
Sep. 06, 2000
Yung-hue Chen, Banchiau, TW;
Ting-yuan Cheng, Hsinchu, TW;
Keng-li Su, Hsinchu, TW;
Industrial Technology Research Institute, Hsinchu, TW;
Abstract
An upconverter for mixing a single-ended RF signal with a differential local oscillator signal to generate a differential IF signal, that includes a source degenerated first differential pair comprising matched first and second transistors, each having source, gate and drain terminals, wherein the gate of the first transistor receives the input signal and the gate of the second transistor receives a ground potential, and a second differential pair comprising matched third and fourth transistors, each having source, gate and drain terminals, and a third differential pair comprising matched fifth and sixth transistors, each having source, gate and drain terminals, wherein the sources of the third and fourth transistors are coupled to the drain of the first transistor and the sources of the fifth and sixth transistors are coupled to the drain of the second transistor, the gate of the third transistor is coupled to the gate of the fifth transistor and the gate of the fourth transistor is coupled to the gate of the sixth transistor, the drain of the third transistor is coupled to the drain of the sixth transistor and the drain of the fourth transistor is coupled to the drain of the fifth transistor, the gates of the third and fourth transistors receive the differential local oscillator signal, the drains of the third and fourth transistors supply the differential IF signal, the gate of the first transistor is coupled to the single-ended RF signal, and the gate of the second transistor is coupled to a DC control signal.