The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7117465 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 03, 2006

Filed:

Jun. 30, 2003
Applicants:

Zurab Khasidashvili, Rishon le Zion, IL;

John Moondanos, San Francisco, CA (US);

Ziyad Hanna, Haifa, IL;

Inventors:

Zurab Khasidashvili, Rishon le Zion, IL;

John Moondanos, San Francisco, CA (US);

Ziyad Hanna, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for facilitating the sequential verification of loop-free circuits by reducing the sequential verification problem to combinational verification, by constructing and comparing Timed Binary Decision. Diagrams (TBDDs) and Timed Binary Expression Diagrams (TBEDs). The TBEDs can be compared by using both BDDs and SAT solvers.


Find Patent Forward Citations

Khasidashvili, Zurab. (2006). Application of the retimed normal form to the formal equivalence verification of abstract rtl descriptions for pipelined designs (U.S. Patent No. 7117465). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7117465

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