The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2006
Filed:
Jan. 28, 2003
Xiangdong Tan, Fremont, CA (US);
Xiangyong Wang, San Jose, CA (US);
Brent A. Fairbanks, Santa Clara, CA (US);
XiangDong Tan, Fremont, CA (US);
Xiangyong Wang, San Jose, CA (US);
Brent A. Fairbanks, Santa Clara, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A method and associated computer program product is provided for determining placement of I/O pins on an integrated circuit device. In an exemplary embodiment, a set of pins to be placed is partitioned into pin groups prior to placing individual pins. After partitioning the pins into pin groups, pin groups may, in a preferred embodiment, be ranked according to difficulty of placement. Pins in the most difficult group are placed first by applying a method that, in a preferred embodiment, places pins within the limits imposed by current density requirements while achieving high pin density within those limits when pad resources are relatively limited.