The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2006

Filed:

Oct. 10, 2002
Applicants:

Hans W. Klein, Danville, CA (US);

Frederic N. F. Deboes, Austin, TX (US);

Douglas C. Morse, Hillsboro, OR (US);

Inventors:

Hans W. Klein, Danville, CA (US);

Frederic N. F. Deboes, Austin, TX (US);

Douglas C. Morse, Hillsboro, OR (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/24 (2006.01); G06F 1/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

Power-sequencing controllers are connected to allow more complex power sequencing and/or larger numbers of voltage supplies to be monitored than with a single controller. Power-on-reset (POR) output signals from the 'slave' controllers are connected by a wired-OR, and the composite output is used as a reset signal or indicator signal by the 'master' controller. An output from the master controller coupled to the composite input signal is connected with the {overscore (POR)} output of the master controller by a wired-OR, and this composite signal is coupled to the reset terminals of the slave controllers. Connecting controllers in a master/slave configuration allows prevents any of the slave devices from starting until all the devices have been released, resulting in synchronous processing of subsequent signals and events.


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