The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2006
Filed:
Mar. 31, 2000
Carl M. Ellison, Portland, OR (US);
Roger A. Golliver, Beaverton, OR (US);
Howard C. Herbert, Phoenix, AZ (US);
Derrick C. Lin, Foster City, CA (US);
Francis X. Mckeen, Portland, OR (US);
Gilbert Neiger, Portland, OR (US);
Ken Reneris, Wilbraham, MA (US);
James A. Sutton, Portland, OR (US);
Shreekant S. Thakkar, Portland, OR (US);
Millind Mittal, Palo Alto, CA (US);
Carl M. Ellison, Portland, OR (US);
Roger A. Golliver, Beaverton, OR (US);
Howard C. Herbert, Phoenix, AZ (US);
Derrick C. Lin, Foster City, CA (US);
Francis X. McKeen, Portland, OR (US);
Gilbert Neiger, Portland, OR (US);
Ken Reneris, Wilbraham, MA (US);
James A. Sutton, Portland, OR (US);
Shreekant S. Thakkar, Portland, OR (US);
Millind Mittal, Palo Alto, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
The present invention is a method and apparatus to generates an isolated bus cycle for a transaction in a processor. A configuration storage contains configuration parameters to configure a processor in one of a normal execution mode and an isolated execution mode. An access generator circuit generates an isolated access signal using at least one of the isolated area parameters and access information in the transaction. The isolated access signal is asserted when the processor is configured in the isolated execution mode. A bus cycle decoder generates an isolated bus cycle corresponding to a destination in the transaction using the asserted isolated access signal and the access information.