The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2006
Filed:
Dec. 03, 2004
Jiro Ishikawa, Higashimurayama, JP;
Takashi Yamaki, Kodaira, JP;
Toshihiro Tanaka, Akiruno, JP;
Yukiko Umemoto, Kodaira, JP;
Akira Kato, Tachikawa, JP;
Jiro Ishikawa, Higashimurayama, JP;
Takashi Yamaki, Kodaira, JP;
Toshihiro Tanaka, Akiruno, JP;
Yukiko Umemoto, Kodaira, JP;
Akira Kato, Tachikawa, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
An erasing current is distributed to reduce a load of an internal power circuit and to decrease the number of drivers for erase. A semiconductor data processing device has: a memory array having nonvolatile memory cells arrayed in a matrix and divided into a plurality of erase blocks each instructed to be erased together; and a control circuit, wherein the control circuit controls both of two kinds of erasing voltages applied to the nonvolatile memory cell in the erase block instructed to be erased together to select an erase sector from the erase block for performing erase for each erase sector, thereby performing the erase for each erase sector in time division. Time division erase can distribute an erasing current. Two kinds of erasing voltages are used to select the erase sector. No specific drivers need be provided for each erase sector.