The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2006

Filed:

Jun. 10, 2003
Applicant:

Puneet Singh, Santa Clara, CA (US);

Inventor:

Puneet Singh, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus to analyze noise in a pulse logic digital circuit comprising identifying a channel connected component (CCC) in the pulse logic digital circuit design, said CCC comprising a pulse generator. Modifying the pulse logic digital circuit by disconnecting the pulse generator form an input of the CCC in the pulse logic digital circuit design. Turning on the pulse logic digital circuit, inputting a noise signal to the CCC and monitoring an output of the pulse logic digital circuit during the time the pulse logic digital circuit is turn on.


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