The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2006
Filed:
Mar. 31, 2004
Darren Slawecki, Santa Clara, CA (US);
Darren Slawecki, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A delay circuit. The delay circuit includes a first circuit, a falling edge delay circuit and a rising edge delay circuit. The first circuit includes a circuit input for receiving a reference signal and a circuit output for outputting a delayed signal. The falling edge delay circuit is coupled to the first circuit to control delay of a falling edge of the reference signal. The rising edge delay circuit is coupled to the first circuit to control delay of a rising edge of the reference signal.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile