The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2006
Filed:
May. 21, 2004
PR Chidambaram, Richardson, TX (US);
Greg C. Baldwin, Plano, TX (US);
PR Chidambaram, Richardson, TX (US);
Greg C. Baldwin, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention provides a system for limiting degradation of a first semiconductor structure () caused by an electric field (), generated from within the semiconductor substrate () by high voltage on a second semiconductor structure (). A semiconductor device () is adapted to reduce the effective magnitude of the field—as realized at structure—to some fractional component (), or to render the angle ()—at which the field approaches the first structure through a first substrate region ()—acute. Certain embodiments of the present invention provide for: lateral recession of the first semiconductor structure to abut an isolation structure (), which is disposed between the second semiconductor structure and the first substrate region; lateral recession of the first semiconductor structure from the isolation structure, so as to form a moat therebetween; and a counter-doped region () within the first substrate region.