The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2006

Filed:

Oct. 14, 2003
Applicants:

Yolanda Yuan, Saratoga, CA (US);

Jason Guo, San Jose, CA (US);

Sai K. Tsang, Union City, CA (US);

Vikram Kowshik, Cupertino, CA (US);

Steven J. Schumann, Sunnyvale, CA (US);

Inventors:

Yolanda Yuan, Saratoga, CA (US);

Jason Guo, San Jose, CA (US);

Sai K. Tsang, Union City, CA (US);

Vikram Kowshik, Cupertino, CA (US);

Steven J. Schumann, Sunnyvale, CA (US);

Assignee:

Atmel Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A decoding system for multi-plane memories routes address information corresponding to distinct memory access operations to the designated planes. The system includes an array of functional registers dedicated to random access read, burst read, program, erase, and erase-suspend program operations. Plane selector blocks for each plane receive the address outputs from all of the registers and plane function select logic controls the routing in accord with memory access commands for specified planes. Simultaneous operations of different type in different planes and nested operations in the same plane are possible.


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