The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2006
Filed:
Jul. 21, 2004
Kim-kwong Michael Han, Los Gatos, CA (US);
Narbeh Derhacobian, Belmont, CA (US);
Jaroslav Raszka, Fremont, CA (US);
Kim-Kwong Michael Han, Los Gatos, CA (US);
Narbeh Derhacobian, Belmont, CA (US);
Jaroslav Raszka, Fremont, CA (US);
Virage Logic Corporation, Fremont, CA (US);
Abstract
A method, apparatus, and system in which an embedded memory comprises one or more electrically-alterable non-volatile memory cells that include a coupling capacitor, a read transistor, and a tunneling capacitor. The coupling capacitor has a first gate composed of both N+ doped material and P+ doped material, and a P+ doped region abutted to a N+ doped region. The P+ doped region abutted to the N+ doped region surrounds the first gate. The read transistor has a second gate. The tunneling capacitor has a third gate composed of both N+ doped material and P+ doped material.