The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2006
Filed:
Feb. 27, 2001
Applicants:
Floyd Goodrich, Iii, Portland, OR (US);
Shannon J. Poulin, Portland, OR (US);
Inventors:
Floyd Goodrich, III, Portland, OR (US);
Shannon J. Poulin, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
Clock multiplier selection methods and apparatuses. One embodiment includes a clock interface to receive a clock signal, a frequency detect circuit, and a multiplier selection circuit. The frequency detect circuit detects an operating frequency of the clock signal and the multiplier selection circuit selects a clock multiplier that is a function of the operating frequency of the clock signal.
Goodrich, III, Floyd. (2006). Clock multiplier selection for a microprocessor with multiple system bus clocking frequencies (U.S. Patent No. 7089441). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7089441
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile