The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 25, 2006
Filed:
Apr. 30, 2003
Juergen Lahner, Sunnyvale, CA (US);
Kiran Atmakuri, Sunnyvale, CA (US);
Kavitha Chaturvedula, San Jose, CA (US);
Balamurugan Balasubramanian, Mountain View, CA (US);
Krishna Devineni, Milpitas, CA (US);
Srinivas Adusumalli, San Jose, CA (US);
Randall P. Fry, Raleigh, NC (US);
Gregory A. Pierce, Ashby, MA (US);
Juergen Lahner, Sunnyvale, CA (US);
Kiran Atmakuri, Sunnyvale, CA (US);
Kavitha Chaturvedula, San Jose, CA (US);
Balamurugan Balasubramanian, Mountain View, CA (US);
Krishna Devineni, Milpitas, CA (US);
Srinivas Adusumalli, San Jose, CA (US);
Randall P. Fry, Raleigh, NC (US);
Gregory A. Pierce, Ashby, MA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A method of automatically analyzing RTL code includes receiving as input RTL code for an integrated circuit design. An RTL platform is selected that incorporates design rules for a vendor of the integrated circuit design. The design rules are displayed from the RTL platform on a graphic user interface. A number of the design rules are selected from the graphic user interface. An analysis is performed in the RTL platform of the RTL code for each of the selected design rules. A result of the analysis is generated as output for each of the selected design rules.