Semiconductor test apparatus for testing semiconductor device that produces output data by its internal clock timing

Abstract

A recovery clock synchronized with an internal clock faster than a system clock is obtained with an edge timing of the system clock output from a DUT. The present invention includes: a time interpolatorwhich includes flip-flops (FF) which receive system clocks of the DUT, a delay circuitwhich outputs time-series level data, from the FF, and an encoderwhich receives the time-series level data output and encodes it into positional data indicative of an edge timing; a digital filterwhich includes a plurality of registerswhich sequentially store the positional data and output the positional data as a recovery clock; and a data side selectorwhich selects output data of the DUTbase on the recovery clock.