The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7078259 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 18, 2006

Filed:

Jan. 08, 2004
Applicants:

Jon A. Casey, Poughkeepsie, NY (US);

William J. Ferrante, Hyde Park, NY (US);

Edward W. Kiewra, Verbank, NY (US);

Carl J. Radens, LaGrangeville, NY (US);

William R. Tonti, Essex Junction, VT (US);

Inventors:

Jon A. Casey, Poughkeepsie, NY (US);

William J. Ferrante, Hyde Park, NY (US);

Edward W. Kiewra, Verbank, NY (US);

Carl J. Radens, LaGrangeville, NY (US);

William R. Tonti, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A structure and method are provided for forming a thermistor. Isolation structures are formed in a substrate including at least an upper layer of a single crystal semiconductor. A layer of salicide precursor is deposited over the isolation region and the upper layer. The salicide precursor is then reacted with the upper layer to form a salicide self-aligned to the upper layer. Finally, the unreacted portions of the salicide precursor are then removed while preserving a portion of the salicide precursor over the isolation region as a body of the thermistor. An alternative integrated circuit thermistor is formed from a region of thermistor material in an embossed region of an interlevel dielectric (ILD).


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