The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2006
Filed:
Jul. 02, 2002
Pradip Bose, Yorktown Heights, NY (US);
Daniel M. Citron, Riverdale, NY (US);
Peter W. Cook, Mount Kisco, NY (US);
Philip G. Emma, Danbury, CT (US);
Hans M. Jacobson, White Plains, NY (US);
Prabhakar N. Kudva, New York, NY (US);
Stanley E. Schuster, Granite Springs, NY (US);
Jude A. Rivers, Cortlandt Manor, NY (US);
Victor V. Zyuban, Yorktown Heights, NY (US);
Pradip Bose, Yorktown Heights, NY (US);
Daniel M. Citron, Riverdale, NY (US);
Peter W. Cook, Mount Kisco, NY (US);
Philip G. Emma, Danbury, CT (US);
Hans M. Jacobson, White Plains, NY (US);
Prabhakar N. Kudva, New York, NY (US);
Stanley E. Schuster, Granite Springs, NY (US);
Jude A. Rivers, Cortlandt Manor, NY (US);
Victor V. Zyuban, Yorktown Heights, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A synchronous integrated circuit such as a scalar processor or superscalar processor. Circuit components or units are clocked by and synchronized to a common system clock. At least two of the clocked units include multiple register stages, e.g., pipeline stages. A local clock generator in each clocked unit combines the common system clock and stall status from one or more other units to adjust register clock frequency up or down.