The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2006

Filed:

Jul. 29, 2005
Applicant:

Philip Neaves, Horsell Village, GB;

Inventor:

Philip Neaves, Horsell Village, GB;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A signal balancing circuit for capacitively coupled signaling between transmitting and receiving devices over a plurality of capacitively coupled signal lines on which data signals are transmitted from the transmitting device to the receiving device. The signal balancing circuit includes an encode circuit for forcing a signal transition of a data signal for a data interval in response to the data signal maintaining the same logic state throughout a respective time interval. A balancing signal is generated having a logic level and a timing relative to the time intervals of the respective data signals indicative of inversion of a particular data signal. A decode circuit coupled to the encode circuit to receive the balancing signal forces a transition of the transitioned signal at the appropriate time in accordance with the balance signal to recover the original logic level of the data signal.


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