The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2006
Filed:
Jan. 30, 2004
Noboru Morita, Kanagawa, JP;
Tatsuya Usami, Kanagawa, JP;
Koichi Ohto, Kanagawa, JP;
Sadayuki Ohnishi, Kanagawa, JP;
Koji Arita, Kanagawa, JP;
Ryohei Kitao, Kanagawa, JP;
Yoichi Sasaki, Kanagawa, JP;
Noboru Morita, Kanagawa, JP;
Tatsuya Usami, Kanagawa, JP;
Koichi Ohto, Kanagawa, JP;
Sadayuki Ohnishi, Kanagawa, JP;
Koji Arita, Kanagawa, JP;
Ryohei Kitao, Kanagawa, JP;
Yoichi Sasaki, Kanagawa, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
A method of fabricating a semiconductor device using a PECVD method is provided, which improves the adhesion strength of a deposited dielectric layer to an underlying layer and the reliability of the deposited dielectric layer. After placing a substrate in a chamber, a gas having a thermal conductivity of 0.1 W/mK or greater (e.g., Hor He) is introduced into the chamber, thereby contacting the gas with the substrate for stabilization of a temperature of the substrate. A desired dielectric layer is deposited on or over the substrate in the chamber using a PECVD method after the step of introducing the gas. As the desired dielectric layer, a dielectric layer having a low dielectric constant, such as a SiCH, SiCHN, or SiOCH layer, is preferably used.