The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2006
Filed:
Sep. 23, 2003
Atsushi Shiraishi, Kodaira, JP;
Takayuki Tamura, Higashiyamato, JP;
Chiaki Kumahara, Kodaira, JP;
Shinsuke Asari, Akishima, JP;
Atsushi Shiraishi, Kodaira, JP;
Takayuki Tamura, Higashiyamato, JP;
Chiaki Kumahara, Kodaira, JP;
Shinsuke Asari, Akishima, JP;
Renesas Technology Corp., Tokyo, JP;
Hitachi ULSI Systems Co., Ltd., Tokyo, JP;
Abstract
A nonvolatile memory has an erase table in which a free-space information flag is associated with each physical address of a memory area and an address translation table in which a physical address of a memory area is associated with each logical address. The free-space information flag indicates whether a corresponding memory area is permitted to be erased. A control circuit determines a memory area to which rewrite data is to be written by referring to the free-space information flag, reflects the physical address and the logical address of the memory area to which the data is written into the address translation table, and updates the free-space information flag. The memory area to which rewrite data is to be written is determined by referring to the free-space information flag, and rewriting is not performed in the same memory area.