The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2006
Filed:
Mar. 09, 2004
Kejun Zeng, Coppell, TX (US);
Kejun Zeng, Coppell, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Method for assembling a semiconductor device having fatigue-resistant interconnection fillet provides a semiconductor chip with at least one solder bump comprising an alloy of tin and lead with a melting temperature higher than the solder paste used. Further, a solder paste (preferably binary) is provided, which comprises tin and about 2.5 weight percent silver, and has a melting temperature of about 221° C. The solder bump is brought in contact with the solder paste, the bump is partially immersed in the paste, and thermal energy is supplied to reflow the solder paste at about 235° C. The amount of energy and time after the reflow of the paste is controlled so that the molten paste dissolves a pre-determined amount of the solder bump (lead and tin) to form a ternary alloy of about eutectic composition (about 1.62 weight % Ag, 36.95 weight % Pb, 61.43 weight % Sn) without melting the solder bump.