The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2006
Filed:
Feb. 02, 2004
Jamal Ramdani, Gilbert, AZ (US);
Ravindranath Droopad, Chandler, AZ (US);
Lyndee L. Hilt, Chandler, AZ (US);
Kurt Williamson Eisenbeiser, Tempe, AZ (US);
Jamal Ramdani, Gilbert, AZ (US);
Ravindranath Droopad, Chandler, AZ (US);
Lyndee L. Hilt, Chandler, AZ (US);
Kurt Williamson Eisenbeiser, Tempe, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.