The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2006
Filed:
Nov. 25, 2003
Robert Y S Huang, Ocoee, FL (US);
Scott Jessen, Orlando, FL (US);
Subramanian Karthikeyan, Orlando, FL (US);
Joshua Jia LI, Vancouver, WA (US);
Isaiah O. Oladeji, Orlando, FL (US);
Kurt George Steiner, Orlando, FL (US);
Joseph Ashley Taylor, Orlando, FL (US);
Robert Y S Huang, Ocoee, FL (US);
Scott Jessen, Orlando, FL (US);
Subramanian Karthikeyan, Orlando, FL (US);
Joshua Jia Li, Vancouver, WA (US);
Isaiah O. Oladeji, Orlando, FL (US);
Kurt George Steiner, Orlando, FL (US);
Joseph Ashley Taylor, Orlando, FL (US);
Agere Systems, Inc., Allentown, PA (US);
Abstract
A mask layer having four mask films used in the fabrication of an interconnect structure of a semiconductor device. The first mask film and the third mask film have substantially equal etch rates. The second mask film and the fourth have substantially equal etch rates film, and different from that of the etch rate of the first and third mask films. A via is etched to the first mask film. Then a trench is etched to the third mask film of the mask layer. The via and trench are then etched in a dielectric material. The second, third and fourth mask films are removed and the first mask film remains a passivation layer for the dielectric material. A conductive metal is deposited in the via and trench.