The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2006

Filed:

Dec. 20, 2000
Applicants:

Ryo Inoue, Austin, TX (US);

Ravi P. Singh, Austin, TX (US);

Charles P. Roth, Austin, TX (US);

Gregory A. Overkamp, Austin, TX (US);

Inventors:

Ryo Inoue, Austin, TX (US);

Ravi P. Singh, Austin, TX (US);

Charles P. Roth, Austin, TX (US);

Gregory A. Overkamp, Austin, TX (US);

Assignees:

Intel Corporation, Santa Clara, CA (US);

Analog Devices, Inc., Norwood, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 9/54 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a programmable processor is adapted to support hardware loops. The processor may include hardware such as a first set of registers, a second set of registers, a first pipeline, and a second pipeline. Furthermore, the processor may include a control unit adapted to efficiently implement the hardware when performing a hardware loop.


Find Patent Forward Citations

Inoue, Ryo. (2006). Hardware loops and pipeline system using advanced generation of loop parameters (U.S. Patent No. 7065636). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7065636

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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