The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2006
Filed:
Dec. 20, 2002
Patrick L. Connor, Portland, OR (US);
Eric K. Mann, Hillsboro, OR (US);
Hieu T. Tran, Portland, OR (US);
Priya Govindarajan, Hillsboro, OR (US);
John P. Jacobs, Beaverton, OR (US);
David M. Durham, Hillsboro, OR (US);
Gary D. Gumanow, Portland, OR (US);
Chun Yang Chiu, Beaverton, OR (US);
Patrick L. Connor, Portland, OR (US);
Eric K. Mann, Hillsboro, OR (US);
Hieu T. Tran, Portland, OR (US);
Priya Govindarajan, Hillsboro, OR (US);
John P. Jacobs, Beaverton, OR (US);
David M. Durham, Hillsboro, OR (US);
Gary D. Gumanow, Portland, OR (US);
Chun Yang Chiu, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Provided are a method, system and article of manufacture for adjusting interrupt levels. A current system interrupt rate at a computational device is determined, wherein the current system interrupt rate is a sum of interrupt rates from a plurality of interrupt generating agents. The current system interrupt rate is compared with at least one threshold interrupt rate associated with the computational device. Based on the comparison, an interrupt moderation level is adjusted at an interrupt generating agent of the plurality of interrupt generating agents.