The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2006

Filed:

Apr. 25, 2002
Applicants:

Takayuki Hirabayashi, Tokyo, JP;

Takahiko Kosemura, Kanagawa, JP;

Akihiko Okubora, Kanagawa, JP;

Tatsuya Ogino, Kanagawa, JP;

Kuniyuki Hayashi, Oita, JP;

Inventors:

Takayuki Hirabayashi, Tokyo, JP;

Takahiko Kosemura, Kanagawa, JP;

Akihiko Okubora, Kanagawa, JP;

Tatsuya Ogino, Kanagawa, JP;

Kuniyuki Hayashi, Oita, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01P 1/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a high-frequency module device having a distributed constant circuit formed therein, the device comprising: a base board () having a high-frequency element layer forming surface () formed by performing flattening processing on an uppermost layer of a multilayer printed wiring part in which a printed wiring layer having a ground part and a dielectric insulating layer made of a dielectric insulating material are formed in a multilayer form on one major surface of a core board (); and a high-frequency element layer part () having a passive element and a circuit element for receiving power or a signal supplied from the base board () via a dielectric insulating part made of a dielectric insulating material, on the high-frequency element layer forming surface () of the base board (). The base board () has a distributed constant circuit () formed by pattern wiring.


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