The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2006

Filed:

Mar. 08, 2005
Applicants:

Noriaki Kodama, Kanagawa, JP;

Kohji Kanamori, Kanagawa, JP;

Junichi Suzuki, Kanagawa, JP;

Teiichirou Nishizaka, Kanagawa, JP;

Yasuhide Den, Kanagawa, JP;

Shinji Fujieda, Tokyo, JP;

Akio Toda, Tokyo, JP;

Inventors:

Noriaki Kodama, Kanagawa, JP;

Kohji Kanamori, Kanagawa, JP;

Junichi Suzuki, Kanagawa, JP;

Teiichirou Nishizaka, Kanagawa, JP;

Yasuhide Den, Kanagawa, JP;

Shinji Fujieda, Tokyo, JP;

Akio Toda, Tokyo, JP;

Assignees:

NEC Electronics Corporation, Kanagawa, JP;

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
Abstract

A nonvolatile memory device includes source and drain regions formed in a semiconductor substrate, and an insulating film formed on a channel region between the source region and the drain region in the semiconductor substrate. The nonvolatile memory device also includes a dielectric film formed above the channel region to store electric charge, and a control gate formed on the dielectric film. Compressive stress in the channel region is equal to or less than 50 MPa.


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