The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2006
Filed:
Feb. 04, 2005
Ralf Henninger, München, DE;
Franz Hirler, Isen, DE;
Uli Hiller, Bad Abbach, DE;
Jan Ropohl, Regensburg, DE;
Ralf Henninger, München, DE;
Franz Hirler, Isen, DE;
Uli Hiller, Bad Abbach, DE;
Jan Ropohl, Regensburg, DE;
Infineon Technologies AG, München, DE;
Abstract
A method for fabricating gate electrodes () in a field plate trench transistor () having a cell array with a plurality of trenches () and a plurality of mesa regions () arranged between the trenches comprises the following steps: application of a gate electrode layer () to the cell array in such a way that the gate electrode layer () has depressions within or above the trenches (), application of a mask layer () to the cell array, etching-back of the mask layer () in such a way that mask layer residues () remain only within the depressions of the gate electrode layer (), and etching-back of the gate electrode layer () using the mask layer residues () as an etching mask in such a way that gate electrode layer residues () remain only within/above the trenches ().