The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2006

Filed:

Oct. 29, 2003
Applicants:

Saravuth Sirinorakul, Bangkok, TH;

Somchai Nondhasitthichai, Bangkok, TH;

Sitta Jewjaitham, Bangkok, TH;

Inventors:

Saravuth Sirinorakul, Bangkok, TH;

Somchai Nondhasitthichai, Bangkok, TH;

Sitta Jewjaitham, Bangkok, TH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A flat no-lead semiconductor die package contains a plurality of studs that protrude from the bottom surface of the capsule and act as electrical contacts, allowing the package to be mounted on a flat surface such as a printed circuit board, while permitting external circuit to be located on the flat surface directly beneath the package. The package may or may not contain a die-attach pad. The die may be mounted flip-chip style on the stud contacts and die-attach pad. A method of fabricating the package includes etching an upper portion of a metal sheet through a mask layer, attaching dice at locations on the surface of the metal sheet, forming a layer of molding compound over the dice, etching the lower portion of the metal sheet through a second mask layer, and separating the packages with a dicing saw or punch tool.


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