The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2006
Filed:
Jul. 18, 2003
John A. Fifield, Underhill, VT (US);
Paul D. Kartschoke, Williston, VT (US);
William A. Klaasen, Underhill, VT (US);
Stephen V. Kosonocky, Wilton, CT (US);
Randy W. Mann, Poughquag, NY (US);
Jeffery H. Oppold, Richmond, VT (US);
Norman J. Rohrer, Underhill, VT (US);
John A. Fifield, Underhill, VT (US);
Paul D. Kartschoke, Williston, VT (US);
William A. Klaasen, Underhill, VT (US);
Stephen V. Kosonocky, Wilton, CT (US);
Randy W. Mann, Poughquag, NY (US);
Jeffery H. Oppold, Richmond, VT (US);
Norman J. Rohrer, Underhill, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A detector circuit and method for detecting a silicon well voltage or current to indicate an alpha particle or cosmic ray strike of the silicon well. One significant application for the detection circuit of the present invention is for the redundancy repair latches that are used in SRAMs. The redundancy repair latches are normally written once at power-up to record failed latch data and are not normally written again. If one of the latches changes states due to an SER (Soft Error Rate-such as a strike by an alpha particle or cosmic ray) event, the repair data in the redundancy latches of the SRAM would now be incorrectly mapped. The detector circuit and method monitors the latches for the occurrence of an SER event, and responsive thereto issues a reload of the repair data to the redundancy repair latches. A first embodiment of the detector circuit differentially detects the floating voltages of first and second silicon wells during periods of non-operation of the circuits fabricated in the first and second silicon wells. In a second embodiment, a detector circuit monitors the background voltage level of a single silicon well over first and second consecutive periods of time. A second application for the detection circuit is for traditional logic circuits.