Systems and methods for circuit testing

Abstract

Systems and methods for improved performance of built-in-self-tests (BISTs) in integrated circuits, where variability is introduced into the self tests to improve the coverage of the tests. In one embodiment, an LBIST system includes scan chains interposed between levels of functional logic in a circuit under test. An exemplary method includes the steps of, for each of one or more initial scan chains, filling the initial scan chains with data comprising a pseudorandom pattern of bits, determining a number of levels of functional circuitry and corresponding subsequent scan chains through which to propagate the data and propagating the data from the initial scan chains through the determined number of levels of functional circuitry and corresponding subsequent scan chains. The number of levels of circuitry through which data is propagated is varied from one test cycle to another based upon a pseudorandom input signal.